Gabatarwa ga ƙayyadaddun bayanai na PCIe 5.0

• Gabatarwa ga ƙayyadaddun bayanai na PCIe 5.0

An kammala ƙayyadadden bayanin PCIe 4.0 a shekarar 2017, amma dandamalin masu amfani ba su goyi bayansa ba har sai da jerin AMD na 7nm Rydragon 3000, kuma a da kayayyaki kamar supercomputing, ajiyar kaya mai sauri a fannin kasuwanci, da na'urorin sadarwa ne kawai suka yi amfani da fasahar PCIe 4.0. Duk da cewa fasahar PCIe 4.0 ba a yi amfani da ita a babban sikelin ba tukuna, ƙungiyar PCI-SIG ta daɗe tana haɓaka saurin PCIe 5.0, saurin siginar ya ninka daga 16GT/s na yanzu zuwa 32GT/s, saurin bandwidth zai iya kaiwa 128GB/s, kuma an kammala ƙayyadadden bayanin sigar 0.9/1.0. An aika sigar v0.7 ta rubutu na yau da kullun na PCIe 6.0 ga membobi, kuma ci gaban ma'aunin yana kan hanya. An ƙara yawan fil na PCIe 6.0 zuwa 64 GT/s, wanda ya ninka na PCIe 3.0 sau 8, kuma bandwidth a cikin tashoshin x16 na iya zama mafi girma fiye da 256GB/s. A wata ma'anar, saurin PCIe 3.0 x8 na yanzu yana buƙatar tashar PCIe 6.0 guda ɗaya kawai don cimmawa. Dangane da v0.7, PCIe 6.0 ya cimma mafi yawan fasalulluka da aka sanar da farko, amma har yanzu ana ƙara inganta yawan amfani da wutar lantarki.d, kuma ma'aunin ya gabatar da sabon kayan aikin daidaitawar wutar lantarki na L0p. Tabbas, bayan sanarwar a cikin 2021, PCIe 6.0 na iya kasancewa a kasuwa a cikin 2023 ko 2024 da wuri. Misali, an amince da PCIe 5.0 a cikin 2019, kuma yanzu ne kawai ake samun shari'o'in aikace-aikace.

Idan aka kwatanta da ƙayyadaddun bayanai na baya, ƙayyadaddun bayanai na PCIe 4.0 sun zo a makare. An gabatar da ƙayyadaddun bayanai na PCIe 3.0 a cikin 2010, shekaru 7 bayan ƙaddamar da PCIe 4.0, don haka tsawon lokacin ƙayyadaddun bayanai na PCIe 4.0 na iya zama ɗan gajeren lokaci. Musamman ma, wasu masu siyarwa sun fara ƙira na'urorin layin jiki na PCIe 5.0 PHY.

Ƙungiyar PCI-SIG tana tsammanin ƙa'idodin biyu za su kasance tare na ɗan lokaci, kuma ana amfani da PCIe 5.0 galibi don na'urori masu aiki mai kyau tare da buƙatun fitarwa mafi girma, kamar GPU don AI, na'urorin sadarwa, da sauransu, wanda ke nufin cewa PCIe 5.0 ya fi yiwuwa ya bayyana a cikin cibiyar bayanai, cibiyar sadarwa, da muhallin HPC. Na'urorin da ke da ƙarancin buƙatun bandwidth, kamar tebur, za su iya amfani da PCIe 4.0.

Ga PCIe 5.0, an ƙara yawan siginar daga 16GT/s na PCIe 4.0 zuwa 32GT/s, har yanzu ana amfani da lambar 128/130, kuma an ƙara yawan bandwidth na x16 daga 64GB/s zuwa 128GB/s.

Baya ga ninka bandwidth ɗin, PCIe 5.0 yana kawo wasu canje-canje, canza ƙirar lantarki don inganta daidaiton sigina, dacewa da baya da PCIe, da ƙari. Bugu da ƙari, an tsara PCIe 5.0 tare da sabbin ƙa'idodi waɗanda ke rage jinkirin jinkiri da raguwar sigina a tsawon nisa.

Ƙungiyar PCI-SIG tana sa ran kammala sigar 1.0 na ƙayyadaddun bayanai a kwata na 1 a wannan shekarar, amma suna iya haɓaka ƙa'idodi, amma ba za su iya sarrafa lokacin da aka gabatar da na'urar tashar zuwa kasuwa ba, kuma ana sa ran na'urorin PCIe 5.0 na farko za su fara fitowa a wannan shekarar, kuma ƙarin kayayyaki za su bayyana a cikin 2020. Duk da haka, buƙatar ƙarin gudu ya sa tsarin daidaitaccen tsari ya ayyana ƙarni na gaba na PCI Express. Manufar PCIe 5.0 ita ce ƙara saurin ma'auni a cikin ɗan gajeren lokaci mai yiwuwa. Saboda haka, an tsara PCIe 5.0 ne kawai don ƙara saurin zuwa ma'aunin PCIe 4.0 ba tare da wasu sabbin fasaloli masu mahimmanci ba.

Misali, PCIe 5.0 baya goyan bayan siginar PAM 4 kuma ya haɗa da sabbin fasalulluka da ake buƙata don kunna ma'aunin PCIe don tallafawa 32 GT/s a cikin ɗan gajeren lokaci.

Kalubalen kayan aiki

Babban ƙalubalen da ake fuskanta wajen shirya samfurin da zai tallafa wa PCI Express 5.0 zai shafi tsawon tashar. Da sauri saurin siginar, haka nan yawan siginar da ake watsawa ta hanyar allon PC zai ƙaru. Nau'o'i biyu na lalacewa ta jiki suna iyakance yadda injiniyoyi za su iya yaɗa siginar PCIe:

· 1. Ragewar tashar

· 2. Tunani da ke faruwa a cikin tashar saboda rashin daidaituwar juriya a cikin fil, mahaɗi, ramuka ta hanyar da sauran tsare-tsare.

Tsarin PCIe 5.0 yana amfani da tashoshi masu rage -36dB a 16 GHz. Mitar 16 GHz tana wakiltar mitar Nyquist don siginar dijital ta GT/s 32. Misali, lokacin da siginar PCIe5.0 ta fara, tana iya samun ƙarfin lantarki na yau da kullun zuwa kololuwa na 800 mV. Duk da haka, bayan wucewa ta tashar -36dB da aka ba da shawarar, duk wani kama da ido a buɗe yake ɓacewa. Ta hanyar amfani da daidaiton mai watsawa (de-accentuating) da daidaitawar mai karɓa (haɗin CTLE da DFE) ne kawai siginar PCIe5.0 za ta iya wucewa ta hanyar tsarin kuma mai karɓa ya fassara ta daidai. Mafi ƙarancin tsayin ido da ake tsammani na siginar PCIe 5.0 shine 10mV (bayan daidaitawa). Ko da tare da mai watsawa mai ƙarancin jitter kusan cikakke, raguwar tashar tana rage girman siginar har zuwa inda duk wani nau'in lalacewar sigina da aka haifar ta hanyar tunani da magana ta hanyar haɗin gwiwa za a iya rufe shi don dawo da ido.