Gabatarwa PCIe 6.0

Ƙungiyar PCI-SIG ta sanar da fitar da ƙa'idar PCIe 6.0 ta v1.0 a hukumance, inda ta bayyana kammala aikinta.

A ci gaba da wannan tsari, saurin bandwidth ya ci gaba da ninkawa, har zuwa 128GB/s (unidirectional) a x16, kuma tunda fasahar PCIe tana ba da damar kwararar bayanai ta hanyar duplex mai cikakken duplex, jimlar fitarwa ta hanyoyi biyu shine 256GB/s. A cewar shirin, za a sami misalai na kasuwanci tsakanin watanni 12 zuwa 18 bayan buga ma'aunin, wanda yake kusan 2023, ya kamata ya kasance akan dandamalin sabar farko. PCIe 6.0 zai zo kafin ƙarshen shekara, tare da bandwidth na 256GB/s.

Komawa ga fasahar kanta, ana ɗaukar PCIe 6.0 a matsayin babban sauyi a tarihin PCIe kusan shekaru 20. A gaskiya ma, PCIe 4.0/5.0 ƙaramin sauyi ne na 3.0, kamar tsarin 128b/130b wanda aka gina bisa ga NRZ (Ba a dawo da shi zuwa Zero ba).

PCIe 6.0 ya canza zuwa siginar PAM4 pulse AM, lambar 1B-1B, siginar guda ɗaya na iya zama yanayin ɓoyewa guda huɗu (00/01/10/11), ninki biyu na baya, yana ba da damar har zuwa mita 30GHz. Duk da haka, saboda siginar PAM4 ta fi NRZ rauni, an sanye ta da tsarin gyara kuskuren gaba na FEC don gyara kurakuran sigina a cikin hanyar haɗin da kuma tabbatar da sahihancin bayanai.

Baya ga PAM4 da FEC, babbar fasaha ta ƙarshe a cikin PCIe 6.0 ita ce amfani da FLIT (Flow Control Unit) a matakin ma'ana. A zahiri, PAM4, FLIT ba sabuwar fasaha ba ce, a cikin 200G+ ultra-high-speed Ethernet an daɗe ana amfani da shi, wanda PAM4 ya kasa tallata babban dalilin shine farashin Layer na zahiri ya yi yawa.

Bugu da ƙari, PCIe 6.0 ya kasance mai jituwa da baya.

PCIe 6.0 ta ci gaba da ninka bandwidth na I/O zuwa 64GT/s bisa ga al'ada, wanda ake amfani da shi ga ainihin bandwidth na PCIe 6.0X1 mai kusurwa ɗaya na 8GB/s, bandwidth na PCIe 6.0×16 mai kusurwa ɗaya na 128GB/s, da kuma bandwidth na pcie 6.0×16 mai kusurwa biyu na 256GB/s. PCIe 4.0 x4 SSDS, waɗanda ake amfani da su sosai a yau, za su buƙaci PCIe 6.0 x1 kawai don yin hakan.

PCIe 6.0 za ta ci gaba da tsarin shigar da bayanai na 128b/130b da aka gabatar a zamanin PCIe 3.0. Baya ga CRC na asali, yana da ban sha'awa a lura cewa sabuwar hanyar sadarwa tana goyon bayan tsarin shigar da bayanai na PAM-4 da ake amfani da shi a Ethernet da GDDR6x, wanda ya maye gurbin PCIe 5.0 NRZ. Ana iya tattara ƙarin bayanai a cikin tashoshi ɗaya a cikin lokaci ɗaya, da kuma tsarin gyaran kurakurai na bayanai marasa jinkiri wanda aka sani da gyaran kurakurai na gaba (FEC) don sa ƙara yawan bandwidth ya yiwu kuma abin dogaro.

Mutane da yawa na iya tambaya, ba a amfani da bandwidth na PCIe 3.0 sau da yawa, menene amfani da PCIe 6.0? Saboda karuwar aikace-aikacen da ke buƙatar bayanai, gami da basirar wucin gadi, tashoshin IO masu saurin watsawa suna ƙara zama buƙatar abokan ciniki a kasuwar ƙwararru, kuma babban bandwidth na fasahar PCIe 6.0 na iya buɗe cikakken aikin samfuran da ke buƙatar babban bandwidth na IO gami da masu hanzartawa, koyon injina da aikace-aikacen HPC. PCI-SIG kuma yana fatan amfana daga ci gaban masana'antar kera motoci, wanda wuri ne mai zafi ga semiconductors, kuma PCI-Special Interest Group ta kafa sabuwar ƙungiyar aiki ta PCIe Technology don mai da hankali kan yadda za a ƙara ɗaukar fasahar PCIe a masana'antar kera motoci, kamar yadda karuwar buƙatar bandwidth ta yanayin muhalli ta bayyana. Duk da haka, yayin da microprocessor, GPU, na'urar IO da ajiyar bayanai za a iya haɗa su da tashar bayanai, PC don samun tallafin hanyar sadarwa ta PCIe 6.0, masana'antun motherboard suna buƙatar yin taka tsantsan don shirya kebul ɗin da zai iya ɗaukar sigina masu sauri, kuma masana'antun chipset suma suna buƙatar yin shirye-shirye masu dacewa. Wani mai magana da yawun Intel ya ƙi faɗin lokacin da za a ƙara tallafin PCIe 6.0 zuwa na'urori, amma ya tabbatar da cewa masu amfani da Alder Lake da Sapphire Rapids na ɓangaren sabar da Ponte Vecchio za su goyi bayan PCIe 5.0. NVIDIA ta kuma ƙi faɗin lokacin da za a gabatar da PCIe 6.0. Duk da haka, BlueField-3 Dpus na cibiyoyin bayanai sun riga sun goyi bayan PCIe 5.0; PCIe Spec kawai yana ƙayyade ayyuka, aiki, da sigogi waɗanda ke buƙatar aiwatarwa a matakin zahiri, amma bai ƙayyade yadda za a aiwatar da waɗannan ba. A wata ma'anar, masana'antun za su iya tsara tsarin Layer na zahiri na PCIe bisa ga buƙatunsu da yanayinsu na ainihi don tabbatar da aiki! Masana'antun kebul na iya yin ƙarin sarari!