Gabatarwa PCIe 6.0

Ƙungiyar PCI-SIG ta sanar da sakin hukuma na PCIe 6.0 ƙayyadaddun ƙayyadaddun v1.0, yana bayyana kammalawa.

Ci gaba da al'ada, saurin bandwidth yana ci gaba da ninki biyu, har zuwa 128GB/s (unidirectional) a x16, kuma tun da fasahar PCIe ta ba da damar kwararar bayanan bidirectional mai cikakken duplex, jimillar abin da aka samu ta hanyar biyu shine 256GB/s. A cewar shirin, za a sami misalai na kasuwanci watanni 12 zuwa 18 bayan buga mizanin, wanda shine kusan 2023, yakamata ya kasance a kan dandamalin uwar garken farko. PCIe 6.0 zai zo a ƙarshen shekara a farkon, tare da bandwidth na 256GB/s

Komawa fasahar kanta, PCIe 6.0 ana ɗaukarta shine babban canji a cikin tarihin shekaru 20 na PCIe. Don zama mai gaskiya, PCIe 4.0/5.0 ƙaramin gyare-gyare ne na 3.0, kamar 128b/130b ɓoyewa dangane da NRZ (Ba Komawa-zuwa-Zero) ba.

PCIe 6.0 ya canza zuwa siginar PAM4 pulse AM, 1B-1B coding, sigina guda ɗaya na iya zama jihohi huɗu (00/01/10/11), sau biyu na baya, yana ba da damar mitar 30GHz. Koyaya, saboda siginar PAM4 ya fi NRZ rauni, an sanye shi da injin gyara kuskuren FEC na gaba don gyara kurakuran sigina a cikin hanyar haɗin yanar gizo da tabbatar da amincin bayanan.

Baya ga PAM4 da FEC, babbar fasaha ta ƙarshe a cikin PCIe 6.0 ita ce amfani da FLIT (Sashin Kula da Guda) a matakin ma'ana. A gaskiya ma, PAM4, FLIT ba sabon fasaha ba ne, a cikin 200G + ultra-high-speed Ethernet an dade ana amfani da shi, wanda PAM4 ya kasa yin girma da girma na dalilin shine cewa farashin Layer na jiki ya yi yawa.

Bugu da kari, PCIe 6.0 ya kasance mai dacewa da baya.

PCIe 6.0 ya ci gaba da ninka bandwidth na I / O zuwa 64GT / s bisa ga al'ada, wanda aka yi amfani da shi zuwa ainihin bandwidth na PCIe 6.0X1 na 8GB / s, PCIe 6.0 × 16 bandwidth unidirectional na 128GB / s, da pcie 6.0 × 16 bidirectional bandwidth / .5 PCIe 4.0 x4 SSDS, waɗanda ake amfani da su sosai a yau, za su buƙaci PCIe 6.0 x1 kawai don yin shi.

PCIe 6.0 za ta ci gaba da rikodin 128b/130b da aka gabatar a zamanin PCIe 3.0. Baya ga ainihin CRC, yana da ban sha'awa a lura cewa sabuwar ka'idar tashar ta kuma goyan bayan rikodin PAM-4 da aka yi amfani da shi a cikin Ethernet da GDDR6x, maye gurbin PCIe 5.0 NRZ. Ana iya tattara ƙarin bayanai a cikin tashoshi ɗaya a cikin adadin lokaci ɗaya, da kuma tsarin gyaran kurakuran bayanan da ba a daɗe ba da aka sani da gyaran kuskuren gaba (FEC) don ƙara haɓaka bandwidth mai yiwuwa kuma abin dogaro.

Mutane da yawa na iya tambaya, PCIe 3.0 bandwidth sau da yawa ba a amfani da shi, PCIe 6.0 menene amfani? Saboda karuwa a cikin aikace-aikacen yunwar bayanai, ciki har da basirar wucin gadi, tashoshi na IO tare da saurin watsawa da sauri suna ƙara zama buƙatar abokan ciniki a cikin kasuwanni masu sana'a, kuma babban bandwidth na fasaha na PCIe 6.0 na iya buɗe cikakken aikin samfurori da ke buƙatar babban bandwidth na IO ciki har da accelerators, koyo na'ura da aikace-aikacen HPC. PCI-SIG kuma tana fatan amfana daga masana'antar kera motoci masu tasowa, wanda wuri ne mai zafi ga semiconductor, kuma ƙungiyar PCI-Special Interest Group ta kafa sabon rukunin aiki na Fasaha na PCIe don mai da hankali kan yadda za a ƙara karɓar fasahar PCIe a cikin masana'antar kera motoci, kamar yadda haɓakar yanayin yanayi ya karu da buƙatar bandwidth ya bayyana. Duk da haka, kamar yadda microprocessor, GPU, IO na'urar da ajiyar bayanai za a iya haɗa su zuwa tashar bayanai, PC don samun goyon bayan PCIe 6.0 interface, masana'antun motherboard suna buƙatar yin hankali sosai don tsara kebul ɗin da zai iya ɗaukar sigina mai sauri, kuma masana'antun kwakwalwan kwamfuta suna buƙatar yin shirye-shirye masu dacewa. Mai magana da yawun Intel ya ƙi cewa lokacin da za a ƙara tallafin PCIe 6.0 zuwa na'urori, amma ya tabbatar da cewa mabukaci Alder Lake da uwar garken Sapphire Rapids da Ponte Vecchio za su goyi bayan PCIe 5.0. NVIDIA kuma ta ƙi faɗi lokacin da za a gabatar da PCIe 6.0. Koyaya, BlueField-3 Dpus don cibiyoyin bayanai sun riga sun goyi bayan PCIe 5.0; Specific na PCIe kawai yana ƙayyadaddun ayyuka, aiki, da sigogi waɗanda ke buƙatar aiwatarwa a Layer na zahiri, amma bai bayyana yadda ake aiwatar da waɗannan ba. A wasu kalmomi, masana'antun na iya tsara tsarin tsarin jiki na PCIe bisa ga bukatun su da ainihin yanayin don tabbatar da aiki! Masu kera kebul na iya yin ƙarin sarari!